Question : circuit and packet switching

Assume you wish to transfer an nbyte file along a path composed of the source,
destination, and 3 switches (4 links). Suppose each link has propagation delay 2 ms, bitrate 4Mbps,
and that the switches support both packet switching and circuit switching. Thus, you can either
break up the file into 1KB packets or set up a circuit through the switches and send the file as one
contiguous bit stream. Suppose packets have 24 bytes header, and 1000 bytes data, packet
processing delay at switches is 1 ms after receiving the packet, that packets can be sent without
waiting for acks. Suppose the circuit setup requires a 1 KB message from source to destination and
another 1 KB message back from destination to source, incurring the same 1 ms switch processing
delay. Assume further, that there is no such processing delay when transferring data over an
established circuit. Also assume file size is a multiple of 1000 bytes.

a. How sensitive are these results to the number of switches along the path? To the bandwidth of the links? To the ratio of packet size to packet header size?
b. How accurate do you think this model of the relative merits of circuits and packets is? Does it ignore important considerations that discredit one or the other approach? If so,what are they?

Answer : circuit and packet switching

--> How sensitive are these results to the number of switches along the path? To the bandwidth of the links? To the ratio of packet size to packet header size?

You have to look at each of these indepenently of each other.

--> How sensitive are these results to the number of switches along the path?

You are correct there, this is basically asking what if you change (add or remove) switches how will it affect the results of n.

--> To the bandwidth of the links?

If you change (increase or decrease) bandwidth how will it affect n.

--> To the ratio of packet size to packet header size?

If you change the amount of data per packet (increase or decrease) how will it affect n.